Atlantic Digital Corporation

                                       PC525 and PC530 Technical Information

Installation
Flat Panel Support
Flat Panel Interface Formats
Flat Panel Interface Hardware Description
TFT LCD Connectors ( J3 and J4 )
J10 Power Connector
Jumper Functions

Flat Panel Interface Examples:

The examples below represent only a few of the Flat Panel displays supported by the PC525 and PC530 controllers. Many other types, formats, and manufacturers are also supported. The examples below can be used as guides for interfacing to similar displays. Atlantic Digital controllers support virtually all TFT, Passive Color, Monochrome LCD, Plasma, and EL displays currently available. Please contact the factory for information regarding particular display types and manufacturers.

Monochrome LCDs
Sharp LM64P839 640 x 480 LCD Mono
Optrex DMF6106NWU-FW LCD Mono
Sharp LM10P10 LCD Mono Hi Res
TFT LCDs
Sharp LQ10DH11 TFT Color
Sharp LQ9D011 TFT Color
Toshiba LTM-09C015-1 TFT Color
Sharp LQ14D311 TFT Color
NEC NL6448AC30-06 TFT Color
Passive Color LCDs
Sharp LM64C031 Passive Color
Sharp LM64C08P Passive Color
Sharp LM64C14P Passive Color
Optrex DMF50351NC-FW Passive Color
Hitachi LMG9721XUFC-1 Passive Color
Sanyo LM-CA53-22NAZ Passive Color
Sanyo LM-CK53-22NEZ Passive Color
Sanyo LCM-5327-24NAK Passive Color
Sharp LJ64H052 EL
Sharp LJ64ZU49/50/51/52 EL
Sharp LJ64ZU31/35 EL 640 X 400
Planar EL640.480-A3 EL
Panasonic MD480B640PG2/3 Plasma

LCD Monochrome and Passive Color Setup Procedure

                                                    PC525/PC530 Installation

The PC525/PC530 may be installed in any " AT " class PC with an available 16 Bit slot. A medium phillips screwdriver or 3/16 nut driver is required. The installation procedure is as follows:

• Make sure that the PC525/PC530 has been properly configured for the particular display that you are driving.
  
• Make sure that the system power is turned off.
  
• Make sure that any other VGA card in the system is removed. If your system has a motherboard VGA controller, it must be disabled via jumper option.
  
• Install the PC525/PC530 in an empty 16 Bit slot and secure it with the mounting screw from step 3 or the spare screw from an unused slot.
  
• Make sure that your system is set up for a VGA controller.
  
• Connect the CRT ( if used ) and the Flat Panel interface cable to the PC525/PC530 and power up your system. For passive Color and Monochrome LCDs, you may want to refer to the the set up procedure.
  
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                                                        Flat Panel Support

A partial list of supported Flat Panel types and technologies is provided below:

640 X 480 Resolution

LCD Monochrome Single/ Dual Scan                  All Manufacturers           PC530

Electroluminescent ( EL )                                      

EL640.480-A3                                                    Planar                            PC525

LJ64ZU49/50/51/52                                            Sharp                            PC525

LJ64H052                                                           Sharp                             PC525

LJ64OU48                                                          Sharp                             PC525

PLASMA                                                            All Manufacturers           PC525

TFT Color LCD                                                  All Manufacturers            PC525

STN Color Single Scan                                       All Manufacturers             PC530

STN Color Dual Scan                                         All Manufacturers             PC530

For information on a specific display type, resolution, or manufacturer, please E-mail us or call us and we will forward our recommendations to you.

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Flat Panel Interface Formats

The PC525 and PC530 controllers may be programmed to interface to all standard Flat Panel types and configurations. Standard supported Flat Panel interfaces are listed below:

Resolution    Type         Drive  Interface      Data Transfer      Color/Mono

640 X 480     LCD          DD      8 Bit              8 Pixels/Clk            Mono

640 X 480     Plasma       SS       8 Bit              2 Pixels/Clk            16 Grey

640 X 480     EL             SS       8 Bit              2 Pixels/Clk             16 Grey

640 X 480     EL             SS       1 Bit              1 PIXEL/Clk           Mono

640 X 480     Plasma       SS       1 Bit              1 PIXEL/Clk           Mono

1280 X 1024 LCD/EL    DD       16 Bit            16 Pixels/Clk           Mono

1024 X 768   LCD/EL    DD       16 Bit            16 Pixels/Clk           Mono

640 X 480     TFT LCD  SS        9 Bit              1 PIXEL/Clk           Color

640 X 480     STN LCD SS        16 Bit             5-1/3 Pixels/Clk      Color

640 X 480     STN LCD SS        8 Bit               2-2/3 Pixels/Clk      Color

640 X 480     STN LCD DD       8 Bit               2-2/3 Pixels/Clk      Color

640 X480      STN LCD DD       16 Bit             5-1/3 Pixels/Clk      Color

SS= Single Panel/Single Scan ( Most Plasma, EL, and TFT Color )
DD= Dual Panel/Dual Scan ( Most Mono LCD and some STN Color LCDs)

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Flat Panel Interface Hardware Description

The PC525 and PC530 general purpose Flat Panel interface connector pin numbers and descriptions are listed below.

PC525/PC530 Signal Name	Signal Type	2x25 Hdr J8 Pin No. (Internal)	44 Pin D-Sub Female J9 Pin No. (External)
PNL0	Video	1	1
PNL1	Video	3	3
PNL2	Video	5	5
PNL3	Video	7	7
PNL4	Video	9	9
PNL5	Video	11	11
PNL6	Video	13	13
PNL7	Video	15	15
PNL8	Video	29	17
PNL9	Video	31	19
PNL10	Video	33	21
PNL11	Video	35	23
PNL12	Video	37	25
PNL13	Video	39	27
PNL14	Video	41	29
PNL15	Video	43	31
P8	Video	45	33
P9	Video	47	35
P10	Video	49	37
P11	Video	30	39
OFLM	Sync	17	38
OLP	Sync	19	43
XCLK	Clock	21#	41#
MULTIFUNCTION		23#	2#
VEE/DE	Power/Sync	25#	N/C
DE SYNC	Sync	N/C	40
OACDCLK	Sync	22	36
GND	Gnd	2,4,6,8,10,12 14,32,34,36,38	4,6,10,16,20,24 30,32,42,44
GND	Gnd	40,42,44,50
VEE	-LCD Bias	N/C	18
+VLCD	+LCD Bias	46	22
+5SW	Power	16	28
+5FUSED	Power	18	26
+12FUSED	Power	24,26	12,14
-12FUSED	Power	20	8
ADJ	Analog	48 ( 23# )	2#

# Indicates a jumper selectable Pin function. Refer to the Jumper Functionality Description for more information on jumper settings.

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TFT LCD Connectors

Two internal connectors ( J3 and J4 ) are provided specifically for interfacing to Sharp and Hitachi TFT LCDs. ( LQ10DH11 and TM26D50VC2AA ) J3 is a Hirose P/N DF11-22DP-2DS and J4 is a Hirose DF11-32DP-2DS.These connectors may also be used for other manufacturer's TFT LCDs that require the same control signals. Their Pin numbers and signal descriptions are as follows:

 

PC525/PC530       Signal Name	TFT Signal		J3 Pin No.	J4 Pin No.
CLK	CK		1	21
P9	R0		3	4
P10	R1		4	3
P11	R2		5	2
PNL5	G0		7	8
PNL6	G1		8	7
PNL7	G2		9	6
PNL1	B0		11	12
PNL2	B1		12	11
PNL3	B2		13	10
OLP	Hsync		15	19
OFLM	Vsync		17	17
DE	Disp Enable		21	15
GND	Gnd		2,6,10,14,16,19	1,5,9,13,14,16,18 20,22,25,29
+5FUSED	VCC		18	23,24,28
+12SW	VDD		20	N/C
VEE	VEE		N/C	26,27

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J10 Power Connector

An internal 3 Pin header ( MOLEX 22-23-2031 ) is provided for routing power into and out of the PC525/PC530. The J10 Pin numbers and descriptions are as follows:

Pin Number	Description	Function
J10-1	+12SW	+12VDC Sequenced for control of CCFT Backlight Invertors and also used for TFT LCD displays that require +12VDC for VDD. +12SW is disabled at power up and enabled when the Flat Panel interface is activated. It may be disabled via software or hardware.Note: Do not use for control of Hot Cathode Backlight Invertors or for any other requirement exceeding 500 mA.
J10-2	Ground	Logic Ground
J10-3	+12FUSED	+12VDC from the ISA bus or it can be configured as an input for external power by removing fuse F1 and resistor R29. If  F1 is removed, external power such as +24VDC required by some EL displays can be routed to the output connector pins J8-24,26 and J9- 12,14. Note: The maximum current is 2A.

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Jumper Functionality

There are 8 user configurable jumpers on the PC530 and 6 on the PC525. They consist of JMP1, JMP2, J5, J6, J7, J11, J12, and J16 on the PC530 and JMP1, JMP2, J6, J7, J11, and J16 on the PC525. JMP1 and JMP2 are 2 Pin headers. All other jumpers are 3 Pin headers. The function of each is described below:

JMP1 Interrupt Enable	When installed, this jumper connects the *IRQ signal from the PC525/PC530 to the IRQ9 Pin on the ISA bus. This jumper is not normally installed. Contact the factory for further information.
JMP2 0 Wait State	When installed, this jumper enables 0 Wait State operation of the PC525/PC530. Since not all systems support this feature, this jumper is not normally installed. Contact the factory for further information.
J5 Convertor Disable	This jumper exists on the PC530 only. It is used to disable the integral DC-DC Convertor. When jumpered 1-2 the DC to DC convertor is enabled. When jumpered 2-3 the DC to DC convertor is disabled. Although normally the DC to DC convertor would be enabled, it may be disabled in the event that the PC530 is used with a Display that does not require a special Bias Voltage such as most TFT LCD, EL, and Plasma displays.
J11 SHIFTCLK Polarity	This jumper selects the polarity of the Flat Panel Data shift clock. Positive 1-2 Positive polarity means that data is sampled on the falling edge of the clock. Negative 2-3 Negative polarity means that data is sampled on the rising edge of the clock. Most LCD displays require a positive polarity clock. Some EL displays require a negative polarity clock.
J12 VEE/+VLCD Select	The J12 setting determines whether the DC to DC convertor outputs a positive voltage (+VLCD) or a negative voltage ( VEE ). Jumpering 1-2 selects VEE and jumpering 2-3 selects +VLCD .  ( PC530 Only )
J16 VEE/DE Select	J16 is used to select either VEE or DE to be routed to J8-25. For Monochrome LCDs, jumpering 1-2 Selects VEE to be routed to J8-25. For Plasma, EL, and TFT displays, J16 should be jumpered 2-3 which selects the sync signal DE. This jumper is not used for STN Color displays and others that require a positive polarity bias voltage.
J6,J7 Steering Jumpers	J6 and J7 are used to steer  PC525 and PC530 input and output signals onto J8 Pin 23 and J9 Pin 2. The signal names, functions, and options are as follows:
	J6-1 *PNL ( Output )  - HCMOS Active Low output signal. This output signal is low when the Flat Panel display is enabled.
	J6-3 *IPNLOFF ( Input ) - HCMOS Active Low input signal. This input may be used to disable the Flat Panel Video data and timing signals via hardware.
	J7-3 ADJ ( Analog ) - External potentiometer connection for remote adjustment of VEE and +VLCD. An external 1K potentiometer may be connected from this point to ground in order to provide a user adjustable contrast control for Passive Color and Monochrome LCDs.  ( PC530 Only )

J6 and J7 Jumper Options:

J6	J7	Signal on J8-23	Signal on J9-2
1-2	1-2	*PNL	*PNL
1-2	2-3	ADJ	ADJ
2-3	1-2	*IPNLOFF	*IPNLOFF
2-3	2-3	ADJ	ADJ

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Flat Panel Interface Examples

Monochrome LCDs:

Most Monochrome LCDs have similar interface requirements. The most common type is the Dual Panel Dual Drive display which consists of two 640 X 240 display halves stacked vertically to provide 640 X 480 resolution. Video data is output simultaneously to the Upper and Lower halves of the display four Pixels per clock for a total of eight Pixels per clock. Gray scales are simulated by using Frame Rate Control.

In addition to Video and sync signals, Monochrome LCDs typically require a negative polarity bias voltage ( VEE ). This voltage usually ranges between -16VDC and -24VDC depending on the display type and manufacturer. Some 640 X 480 Monochrome LCDs as well as many high resolution Monochrome LCDs require positive polarity bias voltage (+VLCD ). Make sure that the J12 jumper is configured correctly for your particular display. The PC530 provides both polarities of this bias voltage on separate pins to avoid display damage in the event of improper jumper configuration.

Some typical LCD Monochrome interfaces are provided below. These can be used as a guide for interfacing to other display types as well.

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Sharp LM64P839

Signal	Pin No.	PC530 Signal	J8	J9	Description
S	1	OFLM	17	38	Scan Start Up ( Vsync )
CP1	2	OLP	19	43	Data Latch ( Hsync )
CP2	3	XCLK	21	41	Data Shift Clock
DISP	4	+5SW	16	28	Display Control
VDD	5	+5FUSED	18	26	+5V Logic Supply
VSS	6	GND	14	30	Ground
VEE	7	VEE	25	18	Negative Bias Supply
DU0	8	PNL3	7	7	Upper Data
DU1	9	PNL2	5	5	Upper Data
DU2	10	PNL1	3	3	Upper Data
DU3	11	PNL0	1	1	Upper Data MSB
DL0	12	PNL7	15	15	Lower Data
DL1	13	PNL6	13	13	Lower Data
DL2	14	PNL5	11	11	Lower Data
DL3	15	PNL4	9	9	Lower Data MSB

Jumper Settings: J5 1-2, J12 2-3, J16 1-2 , J6 1-2, J7 2-3, J11 1-2                             

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Optrex DMF6106NWU-FW

Signal	Pin No.	PC530 Signal	J8	J9	Description
FLM	1	OFLM	17	38	Frame Signal ( Vsync )
LP	2	OLP	19	43	Data latch ( Hsync )
CP	3	XCLK	21	41	Data Shift Clock
M	4	OACDCLK	22	36	AC Drive Signal
VADJ	5	N/C			Wiper of external pot
VCC	6	+5FUSED	18	26	+5V Logic Power
VSS	7	GND	14	30	Logic Gnd
VEE	8	VEE	25	18	Negative LCD Bias
DU0	9	PNL3	7	7	Upper Data
DU1	10	PNL2	5	5	Upper Data
DU2	11	PNL1	3	3	Upper Data
DU3	12	PNL0	1	1	Upper Data MSB
DL0	13	PNL7	15	15	Lower Data
DL1	14	PNL6	13	13	Lower Data
DL2	15	PNL5	11	11	Lower Data
DL3	16	PNL4	9	9	Lower Data MSB

Jumper Settings: J5 1-2, J12 2-3, J16 1-2, J6 1-2, J7 2-3, J11 1-2

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Sharp LM10P10 1024 X 768
 

Signal	Pin No.	PC530 Signal	J8	J9	Description
S	20	OFLM	17	38	Frame Signal ( Vsync )
CP1	21	OLP	19	43	Data Latch ( Hsync )
CP2	22	XCLK	21	41	Data Shift Clock
VDD	25	+5FUSED	18	26	+5V Logic Power
VSS	23	GND	14	30	Logic Gnd
VSS	24	GND	10	24	Logic Gnd
VSS	3	GND	8	20	Logic Gnd
VSS	5	GND	6	16	Logic Gnd
VSS	6	GND	4	10	Logic Gnd
VEE	26	+VLCD	46	22	Positive LCD Bias
DU0	7	PNL3	7	7	Upper Data
DU1	8	PNL2	5	5	Upper Data
DU2	9	PNL1	3	3	Upper Data
DU3	10	PNL0	1	1	Upper Data
DU4	11	PNL11	35	23	Upper Data
DU5	12	PNL10	33	21	Upper Data
DU6	13	PNL9	31	19	Upper Data
DU7	14	PNL8	29	17	Upper Data MSB
DL0	15	PNL7	15	15	Lower Data
DL1	16	PNL6	13	13	Lower Data
DL2	17	PNL5	11	11	Lower Data
DL3	18	PNL4	9	9	Lower Data
DL4	19	PNL15	43	31	Lower Data
DL5	20	PNL14	41	29	Lower Data
DL6	21	PNL13	39	27	Lower Data
DL7	22	PNL12	37	25	Lower Data MSB

Jumper Settings: J5 1-2, J12 1-2, J16 1-2, J6 1-2, J7 2-3, J11 1-2

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LCD Monochrome and Passive Color Set Up Procedure

1. Center VR1 and VR2.
   
2. Make sure that the jumper settings match those listed for your display type.
   
3. Install the PC530 in the computer.
   
4. Make sure that the display and backlight invertor cables are connected.
   
5. Power up the computer and verify that the backlight is on.
   
6. Monitor J12-3 with a DVM for panels using VEE or J12-1 for panels using +VLCD.
   
7. If the display is dark, slowly turn VR1 clockwise until the display becomes visible. If the display is initially washed out, turn VR1 counterclockwise until the display becomes readable. Do not exceed -24 VDC on J12-3 for displays using VEE. If the display does not become readable before -24 VDC is reached, verify that the cable is correct and go to step 1. For displays using +VLCD, refer to the individual display specification for the maximum allowable bias voltage. If further problems are encountered, or if you are not sure about your application, please call the factory for assistance.
   

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TFT Color LCD 640 X 480

TFT LCDs are supported by both the PC525 and PC530 controllers. Most TFT LCDs do not require adjustable bias voltages like the Monochrome LCDs do. The PC525 is well suited for driving these displays with up to 256 simultaneous Colors. Some common TFT LCD interface examples are included below:

Sharp LQ10D011/LQ10DH11

Signal	Pin No.	PC530 Signal	J8	J9	J3	Description
GND	1	GND	2	4	2	Logic Gnd
CK	2	CLK/XCLK	21	41	1	Data Shift Clock
R1	3	P10	49	37	4	Red Data
R0	4	P9	47	35	3	Red Data
GND	5	GND	4	6	6	Logic Gnd
R2	6	P11	30	39	5	Red Data MSB
G1	7	PNL6	13	13	8	Green Data
G0	8	PNL5	11	11	7	Green Data
GND	9	GND	6	10	10	Logic Gnd
G2	10	PNL7	15	15	9	Green Data MSB
B1	11	PNL2	5	5	12	Blue Data
B0	12	PNL1	3	3	11	Blue Data
GND	13	GND	8	16	14	Logic Gnd
B2	14	PNL3	7	7	13	Blue Data MSB
GND	15	GND	10	20	16	Logic Gnd
HSYNC	16	OLP	19	43	15	Hsync
VCC	17	+5FUSED	18	26	18	+5V Logic Power
VSYNC	18	OFLM	17	38	17	Vsync
VDD	19	+12SW	23#	2#	20	+12VDC Sequenced
GND	20	GND	12	24	19	Logic Gnd
RESVD	21	RESVD			22	RESERVED

Jumper Settings: J5 2-3, J12 1-2, J16 1-2, J6 1-2, J7 1-2, J11 1-2

NOTE: J5 and J12 are not installed on the PC525.

A standard 24 inch cable for J3 is available for this display. ( P/N LQ1010DH11-24 )

# +12SW may be jumpered onto J8-23 and J9-2 by removing the jumper from J7 and connecting J10-1 to J7-2.

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Sharp LQ9D011

CN1
Signal	Pin No.	PC530 Signal	J8	J9	J4	Description
CK	1	CLK/XCLK	21	41	21	Data Shift Clock
GND	2	GND	2	4	25	Logic Gnd
HSYNC	3	OLP	19	43	19	Hsync
VSYNC	4	OFLM	17	38	17	Vsync
R0	5	P9	47	35	4	Red Data
R1	6	P10	49	37	3	Red Data
R2	7	P11	30	39	2	Red Data MSB
GND	8	GND	4	6	1	Logic Gnd
G0	9	PNL5	11	11	8	Green Data
G1	10	PNL6	13	13	7	Green Data
G2	11	PNL7	15	15	6	Green Data MSB
GND	12	GND	6	16	5	Logic Gnd
B0	13	PNL1	3	3	12	Blue Data
B1	14	PNL2	5	5	11	Blue Data
B2	15	PNL3	7	7	10	Blue Data MSB
CN2
VCC	1	+5FUSED	18	26	23	+5V Logic Power
VCC	2	+5FUSED	18	26	24	+5V Logic Power
GND	3	GND	8	20	16	Logic Gnd
GND	4	GND	10	24	18	Logic Gnd
ENABLE	5	VEE/DE,DE	25	40	15	Data Enable
TEST	6	N/C				TEST ( OPEN )

Jumper Settings: J5 2-3, J12 1-2, J16 2-3, J6 1-2, J7 1-2, J11 1-2

Note: J5 and J12 are not installed on the PC525.

A standard 24 inch cable for J4 is available for this display. ( P/N LQ9D011-24 )

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Toshiba LTM-09C015-1 640 X 480 TFT LCD

CN1
Signal	Pin No.	PC530 Signal	J8	J9	J4	Description
NCLK	1	CLK/XCLK	21	41	21	Data Shift Clock
GND	2	GND	2	4	25	Logic Gnd
R0	3	P9	47	35	4	Red Data
GND	4	GND	4	6	1	Logic Gnd
R1	5	P10	49	37	3	Red Data
GND	6	GND	6	10	5	Logic Gnd
R2	7	P11	30	39	2	Red Data MSB
GND	8	GND	8	16	9	Logic Gnd
G0	9	PNL5	11	11	8	Green Data
GND	10	GND	10	20	13	Logic Gnd
G1	11	PNL6	13	13	7	Green Data
GND	12	GND	12	24	14	Logic Gnd
G2	13	PNL7	15	15	6	Green Data MSB
GND	14	GND	14	30	16	Logic Gnd
N/C	15
CN2
B0	1	PNL1	3	3	12	Blue Data
GND	2	GND	32	32	18	Logic Gnd
B1	3	PNL2	5	5	11	Blue Data
GND	4	GND	34	42	20	Logic Gnd
B2	5	PNL3	7	7	10	Blue Data MSB
GND	6	GND	36	44	22	Logic Gnd
ENAB	7	VEE/DE,DE	25	40	15	Data Enable
GND	8	GND	38	44	29	Logic Gnd
VCC	9	+5FUSED	18	26	23	+5V Logic Power
VCC	10	+5FUSED	18	26	24	+5V Logic Power

Jumper Settings: J5 2-3, J12 1-2, J16 2-3, J6 1-2, J7 1-2, J11 1-2

Note: J5 and J12 are not installed on the PC525.

Make sure that the display switches are configured for Display Enable Mode.

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Sharp LQ14D311

CN1
Signal	Pin No.	PC530 Signal	J8	J9	J4	Description
CLK	1	CLK/XCLK	21	41	21	Data Shift Clock
GND	2	GND	2	4	25	Logic Gnd
HSYNC	3	OLP	19	43	19	Hsync
VSYNC	4	OFLM	17	38	17	Vsync
R3	5	P9	47	35	4	Red Data
R4	6	P10	49	37	3	Red Data
R5	7	P11	30	39	2	Red Data MSB
GND	8	GND	4	6	1	Logic Gnd
G3	9	PNL5	11	11	8	Green Data
G4	10	PNL6	13	13	7	Green Data
G5	11	PNL7	15	15	6	Green Data MSB
GND	12	GND	6	16	5	Logic Gnd
B3	13	PNL1	3	3	12	Blue Data
B4	14	PNL2	5	5	11	Blue Data
B5	15	PNL3	7	7	10	Blue Data MSB
CN2
VCC	1	+5FUSED	18	26	23	+5V Logic Power
VCC	2	+5FUSED	18	26	24	+5V Logic Power
GND	3	GND	8	20	16	Logic Gnd
GND	4	GND	10	24	18	Logic Gnd
ENABLE	5	VEE/DE,DE	25	40	15	Display Enable
TEST	6	N/C				N/C
CN3
R0	1	P9	47	35	4	Red Data
R1	2	P10	49	37	3	Red Data
R2	3	P11	30	39	2	Red Data
GND	4	GND	4	6	1	Logic Gnd
G0	5	PNL5	11	11	8	Green Data
G1	6	PNL6	13	13	7	Green Data
G2	7	PNL7	15	15	6	Green Data
GND	8	GND	6	16	5	Logic Gnd
B0	9	PNL1	3	3	12	Blue Data
B1	10	PNL2	5	5	11	Blue Data
B2	11	PNL3	7	7	10	Blue Data
TEST	12	N/C				N/C
TEST	13	N/C				N/C
TEST	14	N/C				N/C

Jumper Settings: J5 2-3, J12 1-2, J16 2-3, J6 1-2, J7 1-2, J11 1-2

Note: J5 and J12 are not installed on the PC525.

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NEC NL6448AC30-06
                              

Signal	Pin No.	PC530 Signal	J8	J9	Description
CLK	1	XCLK/CLK	21	41	Data Shift Clock
GND	2	GND	2	4	Logic Gnd
GND	3	GND	4	6	Logic Gnd
HSYNC	4	OLP	19	43	Hsync
VSYNC	5	OFLM	17	38	Vsync
GND	6	GND	6	10	Logic Gnd
R0	7	GND	8	16	Red Data
R1	8	P9	47	35	Red Data
R2	9	P10	49	37	Red Data
R3	10	P11	30	39	Red Data MSB
GND	11	GND	10	20	Logic Gnd
G0	12	GND	12	24	Green Data
G1	13	PNL5	11	11	Green Data
G2	14	PNL6	13	13	Green Data
G3	15	PNL7	15	15	Green Data MSB
GND	16	GND	14	30	Logic Gnd
B0	17	GND	32	32	Blue Data
B1	18	PNL1	3	3	Blue Data
B2	19	PNL2	5	5	Blue Data
B3	20	PNL3	7	7	Blue Data MSB
GND	21	GND	34	42	Logic Gnd
ACS	22				N/C
BLOFF	23	+5SW	16	28	+5VDC Sequenced
GND	24	GND	36	44	Logic Gnd
VCC	25	+5FUSED	18	26	+5V Logic Power
VDD	26	+5FUSED	24	12	+12VDC Fused
VDD	27	+12FUSED	26	14	+12VDC Fused
N/C	28				N/C
GNDB	29	GND	38	42	Logic Gnd
GNDB	30	GND	40	44	Logic Gnd
DE	31	VEE/DE,DE	23	40	Display Enable
MODE	32	+5FUSED	18	26	+5V Logic Power
VCCOFF	33	+5FUSED	18	26	+5V Logic Power
GND	34	GND	42	32	Logic Gnd

Jumper Settings: J5 1-2, J12 2-3, J16 2-3, J6 1-2, J7 1-2, J11 1-2

Note: J5 and J12 are not installed on the PC525.

640 x 480 Dual Scan and Single Scan Passive Color LCDs

The PC530 supports both Single Scan and Dual Scan passive color LCDs from a variety of manufacturers. Many of these displays require a positive polarity bias voltage of between 24VDC and 36VDC. In addition, these displays are quite sensitive to the sequencing of the bias supply. The PC530 provides proper power-up sequencing as well as power-down discharge of the bias supply in order to prevent damage to the display. Some examples of Passive Color LCD interfaces are provided below. These may be used as a guide for interfacing to similar diplays from other manufacturers.

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Sharp LM64C031 Single Scan STN Color

Signal	Pin No.	PC530 Signal	J8	J9	Description
YD	1	OFLM	17	38	Scan Start Up ( Vsync )
LP	2	OLP	19	43	Data Latch ( Hsync )
XCKL	3	P8	45	33	Lower Data Clock
XCKU	4	XCLK	21	41	Upper Data ClockL
N/C	5
VDD	6	+5FUSED	18	26	+5V Logic Power
VSS	7	GND	14	24	Logic Gnd
VEE	8	+VLCD	46	22	+ LCD Bias
VSS	9	GND	44	20	Logic Gnd
D0	10	PNL0	1	1	Data
D1	11	PNL1	3	3	Data
D2	12	PNL2	5	5	Data
D3	13	PNL3	7	7	Data
D4	14	PNL4	9	9	Data
D5	15	PNL5	11	11	Data
D6	16	PNL6	13	13	Data
D7	17	PNL7	15	15	Data
VSS	18	GND	12	16	Logic Gnd

Jumper Settings: J5 1-2, J12 2-3, J16 2-3, J6 1-2, J7 2-3, J11 1-2

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Sharp LM64C08P/LM64C14P Dual Scan Color LCD

Optrex DMF50351NC-FW Dual Scan Color LCD

Hitachi LMG9721XUFC-1 Dual Scan Color LCD

CN1
Signal	Pin No.	PC530 Signal	J8	J9	Description
YD	1	OFLM	17	38	Scan Start Up ( Vsync )
LP	2	OLP	19	43	Data Latch ( Hsync )
XCLK	3	XCLK	21	41	Data Shift Clock
DISP	4	+5SW	16	28	Display On/Off
VDD	5	+5FUSED	18	26	+5V Logic Power
VSS	6	GND	14	24	Logic Gnd
VEE	7	+VLCD	46	22	+ LCD Bias
DU0	8	PNL3	7	7	Data Upper
DU1	9	PNL2	5	5	Data Upper
DU2	10	PNL1	3	3	Data Upper
DU3	11	PNL0	1	1	Data Upper
DU4	12	PNL11	35	23	Data Upper
DU5	13	PNL10	33	21	Data Upper
DU6	14	PNL9	31	19	Data Upper
DU7	15	PNL8	29	17	Data Upper
CN2
VSS	16	GND	12	16	Logic Gnd
DL0	17	PNL7	15	15	Data Lower
DL1	18	PNL6	13	13	Data Lower
DL2	19	PNL5	11	11	Data Lower
DL3	20	PNL4	9	9	Data Lower
DL4	21	PNL15	43	31	Data Lower
DL5	22	PNL14	41	29	Data Lower
DL5	23	PNL13	39	27	Data Lower
DL7	24	PNL12	37	25	Data Lower
VSS	25	GND	38	30	Logic Gnd

Jumper Settings: J5 1-2, J12 2-3, J16 2-3, J6 1-2, J7 2-3, J11 1-2

Note: This interface may be used as a guide for other Dual Scan Passive Color displays.

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Sanyo LM-CA53-22NAZ Single Scan Color LCD

CN1
Signal	Pin No.	PC530 Signal	J8	J9	Description
FLM	1	OFLM	17	38	Scan Start Up ( Vsync )
M	2	OACDCLK	22	36	AC Frame Signal
DISP	3	+5SW	16	28	Display Control
CL1	4	OLP	19	43	Data Latch ( Hsync )
VSS	5	GND	14	24	Logic Gnd
CL2	6	XCLK	21	41	Data Shift Clock
VSS	7	GND	12	20	Logic Gnd
UD0	8	PNL6	13	13	Data Upper
UD1	9	PNL4	9	9	Data Upper
UD2	10	PNL2	5	5	Data Upper
UD3	11	PNL0	1	1	Data Upper
UD4	12	PNL14	41	29	Data Upper
UD5	13	PNL12	37	25	Data Upper
UD6	14	PNL10	33	21	Data Upper
UD7	15	PNL8	29	17	Data Upper
CN2
LD0	16	PNL7	15	15	Data Lower
LD1	17	PNL5	11	11	Data Lower
LD2	18	PNL3	7	7	Data Lower
LD3	19	PNL1	3	3	Data Lower
LD4	20	PNL15	43	31	Data Lower
LD5	21	PNL13	39	27	Data Lower
LD6	22	PNL11	35	23	Data Lower
LD7	23	PNL9	31	19	Data Lower
VDD	24	+5FUSED	18	26	+5V Logic Power
VSS	25	GND	10	16	Logic Gnd
VSS	26	GND	8	30	Logic Gnd
VEE	27	+VLCD	46	22	+ LCD Bias
VEE	28	+VLCD	46	22	+ LCD Bias
VO	29	N/C			Wiper of Contrast Adj. Pot

Jumper Settings: J5 1-2, J12 2-3, J16 2-3, J6 1-2, J7 2-3, J11 1-2

VO ( PIN 29 of Display ) is normally connected to the wiper of a 10K pot used for contrast adjustment. The top of the pot is connected to VEE ( pins 27 and 28 of the display ). The bottom end of the pot is connected through a 20K resistor to ground.

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Sanyo LM-CK53-22NEZ Single Scan Color LCD ( LCM 5330 )

CN1
Signal	Pin No.	PC530 Signal	J8	J9	Description
FLM	30	OFLM	17	38	Scan Start Up ( Vsync )
M	29	OACDCLK	22	36	AC Frame Signal
DISP	28	+5SW	16	28	Display Control
CL1	27	OLP	19	43	Data Latch ( Hsync )
VSS	26	GND	14	24	Logic Gnd
CL2	25	XCLK	21	41	Data Shift Clock
VSS	24	GND	12	20	Logic Gnd
UD0	23	PNL6	13	13	Data Upper
UD1	22	PNL4	9	9	Data Upper
UD2	21	PNL2	5	5	Data Upper
UD3	20	PNL0	1	1	Data Upper
UD4	19	PNL14	41	29	Data Upper
UD5	18	PNL12	37	25	Data Upper
UD6	17	PNL10	33	21	Data Upper
UD7	16	PNL8	29	17	Data Upper
LD0	15	PNL7	15	15	Data Lower
LD1	14	PNL5	11	11	Data Lower
LD2	13	PNL3	7	7	Data Lower
LD3	12	PNL1	3	3	Data Lower
LD4	11	PNL15	43	31	Data Lower
LD5	10	PNL13	39	27	Data Lower
LD6	9	PNL11	35	23	Data Lower
LD7	8	PNL9	31	19	Data Lower
VDD	7	+5FUSED	18	26	+5V Logic Power
VSS	6	GND	10	16	Logic Gnd
VSS	5	GND	8	30	Logic Gnd
VEE	4	+VLCD	46	22	+ LCD Bias
VEE	3	+VLCD	46	22	+ LCD Bias
VO	2	N/C			Wiper of Contrast Adj. Pot

Jumper Settings: J5 1-2, J12 2-3, J16 2-3, J6 1-2, J7 2-3, J11 1-2

VO ( pin 2 of the display ) is normally connected to the wiper of a 10K pot used for contrast adjustment. The top of the pot is connected to VEE ( pins 3 and 4 of the display ). The bottom end of the pot is connected through a 20K resistor to ground.

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Sanyo LCM 5327-24NAK Single Scan Color LCD

CN1
Signal	Pin No.	PC530 Signal	J8	J9	Description
FLM	1	OFLM	17	38	Scan Start Up ( Vsync )
M	2	OACDCLK	22	36	AC Frame Signal
DISP	3	+5SW	16	28	Display Control
CL1	4	OLP	19	43	Data Latch ( Hsync )
VSS	5	GND	14	24	Logic Gnd
CL2	6	XCLK	21	41	Data Shift Clock
VSS	7	GND	12	20	Logic Gnd
UD0	8	PNL6	13	13	Data Upper
UD1	9	PNL4	9	9	Data Upper
UD2	10	PNL2	5	5	Data Upper
UD3	11	PNL0	1	1	Data Upper
UD4	12	PNL14	41	29	Data Upper
UD5	13	PNL12	37	25	Data Upper
UD6	14	PNL10	33	21	Data Upper
UD7	15	PNL8	29	17	Data Upper
CN2
LD0	16	PNL7	15	15	Data Lower
LD1	17	PNL5	11	11	Data Lower
LD2	18	PNL3	7	7	Data Lower
LD3	19	PNL1	3	3	Data Lower
LD4	20	PNL15	43	31	Data Lower
LD5	21	PNL13	39	27	Data Lower
LD6	22	PNL11	35	23	Data Lower
LD7	23	PNL9	31	19	Data Lower
VDD	24	+5FUSED	18	26	+5V Logic Power
VSS	25	GND	10	16	Logic Gnd
VSS	26	GND	8	30	Logic Gnd
VEE	27	+VLCD	46	22	+ LCD Bias
VEE	28	+VLCD	46	22	+ LCD Bias
VO	29	N/C			Wiper of Contrast Adj. Pot

Jumper Settings: J5 1-2, J12 2-3, J16 2-3, J6 1-2, J7 2-3, J11 1-2

VO ( pin 29 of the display ) is normally connected to the wiper of a 10K pot used for contrast adjustment. The top of the pot is connected to VEE ( pins 27 and 28 of the display ). The bottom end of the pot is connected through a 20K resistor to ground.

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640 X 480 Electroluminescent ( EL ) Displays

The PC525 and PC530 support a wide variety of EL displays. The PC525 is best suited to drive EL displays due to the fact that there is no adjustable bias voltage requirement. Some EL displays require +24VDC which must be provided externally. This external power may be routed to the Flat Panel output connectors by removing F1 and R29 and then applying the required external voltage to J10-3 . ( See J10 Power Connector description ) Some popular interfaces are included below. For resolutions other than 640 X 480 or for displays not listed below, please contact the factory.

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Sharp LJ64H052 EL ( LCD Interface )

Signal	Pin No.	PC530 Signal	J8	J9	Description
UD1	1	PNL2	5	5	Upper Data
UD0	2	PNL3	7	7	Upper Data
UD3	3	PNL0	1	1	Upper Data MSB
UD2	4	PNL1	3	3	Upper Data
LD1	5	PNL6	13	13	Lower Data
LD0	6	PNL7	15	15	Lower Data
LD3	7	PNL4	9	9	Lower Data MSB
LD2	8	PNL5	11	11	Lower Data
CP2	9	XCLK	21	41	Data Shift Clock
VSS	10	GND	2	4	Ground
CP1	11	OLP	19	43	Data Latch ( Hsync )
VSS	12	GND	4	6	Ground
S	13	OFLM	17	38	Scan Start Up ( Vsync )
VSS	14	GND	6	10	Ground
VSS	15	GND	10	20	Ground
VSS	16	GND	8	16	Ground
+5V	17	+5FUSED	18	26	+5V Logic Power
+5V	18	+5FUSED	18	26	+5V Logic Power
+12V	19	+12FUSED	24	12	+12V Power
+12V	20	+12FUSED	26	14	+12V Power

Jumper Settings: J5 2-3, J12 2-3, J16 1-2, J6 1-2, J7 1-2, J11 1-2

Note: J5 and J12 are not installed on the PC525.

Make sure that U11 is installed if you are using a PC525 to drive this display. ( U5 is located in the lower left corner of the board. )

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Sharp LJ64ZU49/50/51/52 640 X 480 EL 16 Gray Level

Signal	Pin No.	PC530 Signal	J8	J9	Description
N/C	A1
N/C	B1
D11	A2	PNL5	11	11	Data
D10	B2	PNL4	9	9	Data
D13	A3	PNL7	15	15	Data
D12	B3	PNL6	13	13	Data
D01	A4	PNL1	3	3	Data
D00	B4	PNL0	1	1	Data
D03	A5	PNL3	7	7	Data
D02	B5	PNL2	5	5	Data
N/C	A6
N/C	B6
CKD	A7	XCLK	21	41	Data Shift Clock
GND	B7	GND	2	4	Ground
HD	A8	VEE/DE,DE	25	40	Data Latch ( Hsync )
GND	B8	GND	4	6	Ground
VD	A9	OFLM	17	38	Scan Start Up ( Vsync )
GND	B9	GND	6	10	Ground
GND	A10	GND	8	16	Ground
GND	B10	GND	10	20	Ground
VL#	A11	+12FUSED	24	12	External +24VDC
VL#	B11	+12FUSED	26	14	External +24VDC
VL	A12	+5FUSED	18	26	+5V Logic Power
VL	B12	+5FUSED	18	26	+5V Logic Power
VD*	A13	+12FUSED	24	12	+12V Power
VD*	B13	+12FUSED	26	14	+12V Power

Jumper Settings: J5 2-3, J12 2-3, J16 2-3, J6 1-2, J7 1-2, J11 2-3

Note: J5 and J12 are not installed on the PC525.

# For LJ64ZU49 which requires external +24VDC. These pins are not connected on +12VDC versions. ( See J10 Power Connector description. )

* These pins are not connected on +24 VDC versions.

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Sharp LJ64ZU31/ZU35 640 X 400 EL 16 Gray Levels

Signal	Pin No.	PC530 Signal	J8	J9	Description
D1	A1	PNL5	11	11	Data
D0	B1	PNL4	9	9	Data
D3	A2	PNL7	15	15	Data
D2	B2	PNL6	13	13	Data MSB
N/C	A3
N/C	B3
CKD	A4	XCLK	21	41	Data Shift Clock
GND	B4	GND	2	4	Ground
HD	A5	VEE/DE,DE	25	40	Data Latch ( Hsync )
GND	B5	GND	4	6	Ground
VD	A6	OFLM	17	38	Scan Start Up ( Vsync )
GND	B6	GND	6	10	Ground
GND	A7	GND	8	16	Ground
GND	B7	GND	10	20	Ground
VD#	A8	+12FUSED	24	12	External +24VDC
VD#	B8	+12FUSED	26	14	External +24VDC
VL	A9	+5FUSED	18	26	+5V Logic Power
VL	B9	+5FUSED	18	26	+5V Logic Power
N/C	A10
N/C	B10

Jumper Settings: J5 2-3, J12 2-3, J16 2-3, J6 1-2, J7 1-2, J11 2-3

Note: J5 and J12 are not installed on the PC525.

# Remove F1 and R29 and apply + 24VDC to J10-3. ( See J10 Power Connector description)

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Planar EL640.480-A3 640 X 480 EL 16 Gray Levels

J1 Signal Connector
Signal	Pin No.	PC530 Signal	J8	J9	Description
GND	1	GND	2	4	Ground
D0	2	PNL0	1	1	Data
GND	3	GND	4	6	Ground
D1	4	PNL1	3	3	Data
GND	5	GND	6	10	Ground
D2	6	PNL2	5	5	Data
N/C	7	N/C
D3	8	PNL3	7	7	Data
N/C	9	N/C
D4	10	N/C
N/C	11	N/C
D5	12	N/C
N/C	13	N/C
D6	14	N/C
GND	15	N/C
D7	16	N/C
GND	17	GND	8	16	Ground
VCLK	18	XCLK	21	41	Data Shift Clock
GND	19	GND	10	20	Ground
_BLANK	20	N/C
GND	21	GND	12	24	Ground
HS	22	VEE/DE,DE	25	40	Data Latch ( Hsync )
N/C	23	N/C
VS	24	OFLM	17	38	Scan Start Up ( Vsync )
N/C	25	N/C
SELFTEST	26	GND	14	30	Ground
COLMAP	27	N/C
ENABLE	28	N/C
RESERVED	29	N/C
_LPOW	30	N/C
N/C	31	N/C
N/C	32	N/C
RESERVED	33	N/C
RESERVED	34	N/C
J2 Power Input Connector
VCC2	1	+12FUSED	24	12	+12VDC Power
GND	2	GND	32	42	Ground
GND	3	GND	34	44	Ground
VCC1	4	+5FUSED	18	26	+5V Logic Power

Jumper Settings: J5 2-3, J12 2-3, J16 2-3, J6 1-2, J7 1-2, J11 2-3

Notes: J5 and J12 are not installed on the PC525.

EL640.480 Panel Jumper Settings:

• Set VCC1 Jumper to " EXT " .
  
• Set DCON Jumper to " 1-D " .
  
• Set the DEFMAP Jumper to " BIN "
  
• Remove " VERPOS " jumpers as required for proper vertical centering.
  

Panasonic MD480B640PG3 640 X 480 Plasma 16 Gray Levels

Signal	Pin No.	PC530 Signal	J8	J9	Description
VSYNC	1	OFLM	17	38	Scan Start Up ( Vsync )
GND	2	GND	2	4	Ground
HSYNC	3	OLP	19	43	Hsync
GND	4	GND	2	4	Ground
DATAO0	5	PNL3	7	7	Data
GND	6	GND	4	6	Ground
DATAO1	7	PNL2	5	5	Data
GND	8	GND	4	6	Ground
DATAO2	9	PNL1	3	3	Data
GND	10	GND	6	10	Ground
DATAO3	11	PNL0	1	1	Data
GND	12	GND	6	10	Ground
DATAE0	13	PNL7	15	15	Data
GND	14	GND	8	16	Ground
DATAE1	15	PNL6	13	13	Data
GND	16	GND	8	16	Ground
DATAE2	17	PNL5	11	11	Data
GND	18	GND	10	20	Ground
DATAE3	19	PNL4	9	9	Data
GND	20	GND	10	20	Ground
DSPTMG	21	VEE/DE,DE	25	40	Data Enable
GND	22	GND	12	24	Ground
BACKG	23	N/C
GND	24	GND	12	24	Ground
CLOCK	25	XCLK	21	41	Data Shift Clock
GND	26	GND	14	30	Ground
J2 Power Connector
+12V	1	+12FUSED	24	12	+12VDC Power
+12V	2	+12FUSED	26	14	+12VDC Power
GND	3	GND	14	30	Ground
GND	4	GND	14	30	Ground
+5V	5	+5FUSED	18	26	+5V Logic Power

Jumper Settings: J5 2-3, J12 2-3, J16 2-3, J6 1-2, J7 1-2, J11 1-2

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